1. Field of the Invention
The present invention relates to a storage device and a semiconductor device and, more particularly, to a storage device and a semiconductor device including a memory cell that uses storage elements for storing and holding information in accordance with the state of electrical resistance.
2. Description of the Related Art
In information devices, such as computers, as a random access memory, a DRAM (Dynamic Random Access Memory) that operates at a high speed and that has a high density is widely used. However, since the DRAM is a volatile memory such that information is erased when the power supply is switched off, there has been a demand for non-volatile memories in which information is not erased.
As a non-volatile memory that is thought to hold great promise in the future, an FeRAM (ferroelectric memory), an MRAM (magnetic memory), a phase-change memory, and resistance-change type memories such as a PMC (Programmable Metallization Cell) and an RRAM (Resistance RAM), have been proposed.
In the case of these memories, it is possible to hold written information for a long period of time even if power is not supplied. Furthermore, in the case of these memories, as a result of being formed to be non-volatile, it is considered that a refresh operation is eliminated and the power consumption can be reduced correspondingly.
In addition, resistance-change non-volatile memories, such as a PMC and an RRAM, are configured comparatively simple in such a manner that a material having characteristics such that the resistance value thereof changes as a result of a voltage and an electrical current being applied is used for a storage layer for storing and holding information, two electrodes are provided with the storage layer in between, and a voltage and an electrical current are applied to these two electrodes. Thus, fine patterning of storage elements is easy.
PMC is constructed so as to sandwich an ion conductor containing a predetermined metal between two electrodes, and uses characteristics such that, as a result of allowing a metal contained in the ion conductor to be further contained in one of the two electrodes, the electrical characteristics of the resistance or the capacitance of the ion conductor change when a voltage is applied between the two electrodes.
More specifically, the ion conductor is formed of a solid solution (for example, amorphous GeS or amorphous GeSe) of chalcogenide and a metal, and one of the two electrodes contains Ag, Cu, or Zn (refer to, for example, PCT Japanese Translation Patent Publication No. 2002-536840).
For the structure of an RRAM, for example, a structure in which a polycrystalline PrCaMnO3 thin film is sandwiched between two electrodes and a voltage pulse or an electrical current pulse is applied between the two electrodes, causing the resistance value of PrCaMnO3, which is a recording film, to be greatly changed is introduced (refer to, for example, W. W. Zhuang, “Novel Colossal Magnetoresistive Thin Film Nonvolatile Resistance Random Access Memory (RRAM)”, Technical Digest “International Electron Devices Meeting”, 2002, p. 193). Then, a voltage pulse whose polarity differs between when information is recorded (written) and when information is erased is applied.
Furthermore, for another structure of RRAM, for example, a structure in which SrZrO3 (monocrystal or polycrystal) in which Cr is doped in small amounts is sandwiched between two electrodes, and an electrical current is made to flow from those electrodes, causing the resistance of the recording film to change is introduced (refer to, for example, A. Beck, “Reproducible switching effect in thin oxide films for memory applications”, Applied Physics Letters, 2000, vol. 77, p. 139-141).
In this “Reproducible switching effect in thin oxide films for memory applications”, I versus V characteristics of the storage layer are shown, and the threshold voltage during a recording and erasure is ±0.5 V. Also, in this structure, the recording and erasure of information are possible by the application of a voltage pulse, the necessary pulse voltage is set at ±1.1 V, and the necessary voltage pulse width is set at 2 ms. In addition, high-speed recording and erasure are possible, and operation at the voltage pulse width of 100 ns is reported. In this case, the necessary pulse voltage is ±5 V.